Inapac
Announces New 32Mb Stacked DRAM Design
Ideal
For Use In Cellular Handset, Mobile TV and Broadband Wireless Applications
San Jose, CA, -- Oct.
16, 2007 – Inapac Technology, Inc., a leading provider of
DRAM
solutions optimized for system-in-package (SiP)
and multi-chip-package (MCP) devices, today announced the addition of
a new 32Mb (megabit) SDRAM design to its family of products.
The new memory chip design is cost- and feature-optimized to
meet the requirements of mobile wireless applications, including media
and image processors, WiMAX basebands and digital TV demodulators.
Inapac estimates that the total cost of incorporating the 32Mb
DRAM
die into a SiP/MCP solution will be less than
$0.60 in volume production in 2008.
“This
new 32Mb design makes it easier and more cost-efficient to create SiPs
for a new generation of mobile handset applications,” said
Naresh Baliga,
vice president of marketing for Inapac.
“It is bond-pad compatible with our
existing 32Mb design, offering our customers a seamless transition
path to lower power and reduced cost.”
The
chip design is based on Inapac’s proven, high-volume SiPFLOW™
platform, which incorporates a unique design-for-test (DFT)
architecture and production methodology that enables SiP/MCP suppliers
to minimize costs while achieving exceptional levels of production
quality and reliability. With
tens of millions of units produced to date using Inapac’s platform,
the company has consistently achieved industry-leading reliability rates of less than 100 dppm
(defective parts per million).
Configuration, Availability
The new Inapac 32Mb SDRAM
design is fully characterized for production on the ProMOS 0.12-micron
manufacturing process, and can be used for SiP/MCP implementations in
stacked (die-to-die or die-to-substrate) configurations in all typical
SiP/MCP package types (BGA, QFP, etc.).
Samples are available now, along with the full suite of
Inapac’s SiPFLOW platform deliverables.
About Inapac
Inapac
Technology, Inc. is a leading provider of memory technology and
services for SiP (system-in-package) and MCP (multi-chip-package)
solutions. Inapac provides
IP and services based on a DFT (design-for-test) production
methodology to deliver reliable, cost-effective memories.
Products based on the company's proven SiPFLOW™ platform are
licensed to semiconductor companies to enhance the performance,
quality and reliability of products in the cell phone, consumer
audio/video, digital imaging, and storage markets.
Inapac is headquartered in
San Jose
,
California
, with additional offices in
Boise
,
Idaho
, and
Hsin-chu
,
Taiwan
. For more information, visit the company's
website at www.inapac.com.
Media Contact
Joe
Fowler
FS
Communications
Tel:
650-691-1488
joe@fscomm.com
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