Intellectual Property & Services For Reliable SiPs

Inapac SiPFLOW™ DFT IP Named Finalist for 16th Annual EDN Magazine Innovation of the Year Award

San Jose, CA -- February 9, 2006 -- Inapac Technology today announced that its SiPFLOW™ DFT (design-for-test) IP (intellectual property) platform has been selected from a field of hundreds as a finalist for this year's EDN Innovator/Innovation Awards.

Instituted in 1990, the Innovation Awards honor the people, products and technologies that have shaped the semiconductor industry over the past year.  This year's program features 17 categories, including: Innovator of the Year; Digital SOC/IP; ASSPs and SOCs; EDA (Design and Implementation); EDA (Verification and Analysis); Analog ICs; Communication ICs; Digital ICs and Programmable Logic; Embedded Systems; and Test and Measurement.

The Inapac SiPFLOW™ platform was selected as a finalist in the Digital SoC/IP category based on the following criteria:

• It demonstrated innovation that resulted in a significant advance in technology and/or product development during the past 12 months.

• It shipped in volume in the 2005 calendar year.  (The SiPFLOW platform has been integrated into more than 8 million shipped SiPs.)

Inapac Technology's SiPFLOW platform makes it easier and less expensive to integrate memory into the SiP/MCP (system-in-package/multichip package) devices that are addressing the high-volume mobile and consumer markets.  The SiPFLOW licensable methodology combines SiP/MCP-optimized memory IP designs with a complete, integrated test infrastructure. The test feature eliminates much of the extra cost involved in producing known good die (KGD) for SiP/MCP designs.

“The advancements that distinguish the finalists in the annual EDN Innovation program may seem subtle — minimally lower power, a slight reduction in cost, the ability to discern a faster signal, or the gateway to new semiconductor processes,” stated EDN Editor-In-Chief Maury Wright.  “Yet those subtleties represent hard-won engineering victories that make all the difference in the latest compelling consumer products, computers, and communication systems.”

In the next few weeks, EDN's worldwide audience of electronics engineers and engineering managers will use an on-line ballot to select the ultimate winners from among these finalists.  EDN's editorial staff and Editorial Advisory Board also take part in determining the final winners.

Winners will be announced at a ceremony on April 3, 2006, in San Jose , California .

About EDN/Reed Business Information

Known as the “Voice of the engineer,” Waltham, MA-based EDN serves the vital information needs of design engineers and engineering managers worldwide.  The EDN franchise includes EDN, EDN Europe, EDN Asia, EDN Australia, EDN China, EDN Japan, and EDN.com.  EDN is published by Reed Business Information (www.reedbusiness/us.com), the largest business-to-business publisher in the U.S. and a member of the Reed Elsevier Group plc (NYSE: RUK and ENL), a world-leading publisher and information provider operating in the science and medical, legal, education and business-to-business industry sectors.

About Inapac

Inapac Technology, Inc. is a leading provider of technology and services for system-in-package (SiP) applications, focused on providing IP to enable the production of reliable, cost-effective memories optimized for SiP.  Products based on the company’s patented SiPFLOW™ platform are licensed to semiconductor and systems companies to enhance the performance, quality and reliability of products in the cell phone, consumer audio/video, digital imaging, and storage markets.  Inapac is headquartered in San Jose , California , with additional offices in Boise , Idaho , and Hsinchu , Taiwan .